BR25G512FVT-3
SPI BUS EEPROM

BR25G512FVT-3是512kbit SPI BUS 介面的序列EEPROM。

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* 本產品是標準級的產品。
本產品不建議使用的車載設備。

Product Detail

 
料號 | BR25G512FVT-3GE2
狀態 | 推薦品
封裝 | TSSOP-B8
單位數量 | 3000
最小包裝數量 | 3000
包裝形式 | Taping
RoHS | Yes

規格:

Series

BR25G-3

Density [bit]

512K

Bit Format [Word x Bit]

64K x 8

Vcc(Min.)[V]

1.8

Vcc(Max.)[V]

5.5

Circuit Current (Max.)[mA]

4

Standby Current (Max.)[μA]

1

Write Cycle (Max.)[ms]

5

Input Frequency (Max.)[Hz]

10M

Endurance (Max.)[Cycle]

106

Data Retention (Max.)[Year]

100

I/F

SPI BUS

Operating Temperature (Min.)[°C]

-40

Operating Temperature (Max.)[°C]

85

Package Size [mm]

3x6.4 (t=1.2)

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功能:

  • High Speed Clock Action up to 10MHz (Max)
  • Wait Function by HOLDB Terminal
  • Part or Whole of Memory Arrays Settable as Read only Memory Area by Program
  • 1.8V to 5.5V Single Power Source Operation Most Suitable for Battery Use
  • Up to 128 Bytes in Page Write Mode.
  • For SPI BUS interface (CPOL, CPHA) = (0, 0), (1, 1)
  • Self-timed Programming Cycle
  • Low Current Consumption
    ·At Write Action (5V) : 0.7mA (Typ)
    ·At Read Action (5V) : 2.4mA (Typ)
    ·At Standby Action (5V) : 0.1µA (Typ)
  • Address Auto Increment Function at Read Action
  • Prevention of Write Mistake
    ·Write Prohibition at Power On
    ·Write Prohibition by Command Code (WRDI)
    ·Write Prohibition by WPB Pin
    ·Write Prohibition Block Setting by Status Registers (BP1, BP0)
    ·Prevention of Write Mistake at Low Voltage
  • More than 100 years Data Retention
  • More than 1 Million Write Cycles
  • Bit Format 64K×8
  • Initial Delivery Data
    Memory Array: FFh
    Status Register: WPEN, BP1, BP0 : 0
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